mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-10 09:35:06 +00:00
143 lines
5.7 KiB
YAML
143 lines
5.7 KiB
YAML
test_cases:
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input:
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bytes: [ 0x9d, 0xfc, 0x00, 0x1e, 0x90, 0xfc, 0x00, 0x1e, 0xb0, 0xfc, 0x00, 0x1e, 0x9b, 0xfc, 0x00, 0x1e, 0xb0, 0xfc, 0x00, 0xbe, 0x90, 0xfc, 0x20, 0x1e, 0xb0, 0xfc, 0x20, 0x7e, 0x90, 0xfc, 0x80, 0x1e, 0xb0, 0xfc, 0x80, 0x1e, 0x9b, 0xfc, 0x80, 0x1e, 0xb0, 0xfc, 0x80, 0xbe, 0x90, 0xfc, 0xa0, 0x1e, 0xb0, 0xfc, 0xa0, 0x7e, 0x90, 0xfc, 0x00, 0x1f, 0xb0, 0xfc, 0x00, 0x1f, 0x9b, 0xfc, 0x00, 0x1f, 0xb0, 0xfc, 0x00, 0xbf, 0x90, 0xfc, 0x20, 0x1f, 0xb0, 0xfc, 0x20, 0x7f, 0x80, 0xfc, 0x00, 0x1e, 0xa0, 0xfc, 0x00, 0x1e, 0x8b, 0xfc, 0x00, 0x1e, 0xa0, 0xfc, 0x00, 0xbe, 0x80, 0xfc, 0x20, 0x1e, 0xa0, 0xfc, 0x20, 0x7e, 0x80, 0xfc, 0x80, 0x1e, 0xa0, 0xfc, 0x80, 0x1e, 0x8b, 0xfc, 0x80, 0x1e, 0xa0, 0xfc, 0x80, 0xbe, 0x80, 0xfc, 0xa0, 0x1e, 0xa0, 0xfc, 0xa0, 0x7e, 0x80, 0xfc, 0x00, 0x1f, 0xa0, 0xfc, 0x00, 0x1f, 0x8b, 0xfc, 0x00, 0x1f, 0xa0, 0xfc, 0x00, 0xbf, 0x80, 0xfc, 0x20, 0x1f, 0xa0, 0xfc, 0x20, 0x7f, 0x90, 0xfc, 0x01, 0x1e, 0xb0, 0xfc, 0x01, 0x1e, 0x9b, 0xfc, 0x01, 0x1e, 0xb0, 0xfc, 0x01, 0x7e, 0x90, 0xfc, 0x21, 0x1e, 0xb0, 0xfc, 0x21, 0x9e, 0x90, 0xfc, 0x41, 0x1e, 0xb0, 0xfc, 0x41, 0x1e, 0x90, 0xfc, 0x61, 0x1e, 0xb0, 0xfc, 0x61, 0x9e, 0x90, 0xfc, 0x81, 0x1e, 0xb0, 0xfc, 0x81, 0x1e, 0x9b, 0xfc, 0x81, 0x1e, 0xb0, 0xfc, 0x81, 0x7e, 0x90, 0xfc, 0xa1, 0x1e, 0xb0, 0xfc, 0xa1, 0x9e, 0x90, 0xfc, 0xc1, 0x1e, 0xb0, 0xfc, 0xc1, 0x1e, 0x90, 0xfc, 0xe1, 0x1e, 0xb0, 0xfc, 0xe1, 0x9e, 0x90, 0xfc, 0x01, 0x1f, 0xb0, 0xfc, 0x01, 0x1f, 0x9b, 0xfc, 0x01, 0x1f, 0xb0, 0xfc, 0x01, 0x7f, 0x90, 0xfc, 0x21, 0x1f, 0xb0, 0xfc, 0x21, 0x9f, 0x90, 0xfc, 0x41, 0x1f, 0xb0, 0xfc, 0x41, 0x1f, 0x90, 0xfc, 0x61, 0x1f, 0xb0, 0xfc, 0x61, 0x9f ]
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arch: "CS_ARCH_ARM"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_MCLASS", "CS_MODE_V8", "CS_MODE_THUMB" ]
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expected:
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insns:
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asm_text: "vld20.8 {q0, q1}, [sp]"
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asm_text: "vld20.8 {q0, q1}, [r0]"
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asm_text: "vld20.8 {q0, q1}, [r0]!"
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asm_text: "vld20.8 {q0, q1}, [r11]"
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asm_text: "vld20.8 {q5, q6}, [r0]!"
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asm_text: "vld21.8 {q0, q1}, [r0]"
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asm_text: "vld21.8 {q3, q4}, [r0]!"
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asm_text: "vld20.16 {q0, q1}, [r0]"
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asm_text: "vld20.16 {q0, q1}, [r0]!"
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asm_text: "vld20.16 {q0, q1}, [r11]"
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asm_text: "vld20.16 {q5, q6}, [r0]!"
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asm_text: "vld21.16 {q0, q1}, [r0]"
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asm_text: "vld21.16 {q3, q4}, [r0]!"
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asm_text: "vld20.32 {q0, q1}, [r0]"
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asm_text: "vld20.32 {q0, q1}, [r0]!"
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asm_text: "vld20.32 {q0, q1}, [r11]"
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asm_text: "vld20.32 {q5, q6}, [r0]!"
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asm_text: "vld21.32 {q0, q1}, [r0]"
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asm_text: "vld21.32 {q3, q4}, [r0]!"
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asm_text: "vst20.8 {q0, q1}, [r0]"
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asm_text: "vst20.8 {q0, q1}, [r0]!"
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asm_text: "vst20.8 {q0, q1}, [r11]"
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asm_text: "vst20.8 {q5, q6}, [r0]!"
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asm_text: "vst21.8 {q0, q1}, [r0]"
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asm_text: "vst21.8 {q3, q4}, [r0]!"
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asm_text: "vst20.16 {q0, q1}, [r0]"
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asm_text: "vst20.16 {q0, q1}, [r0]!"
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asm_text: "vst20.16 {q0, q1}, [r11]"
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asm_text: "vst20.16 {q5, q6}, [r0]!"
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asm_text: "vst21.16 {q0, q1}, [r0]"
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asm_text: "vst21.16 {q3, q4}, [r0]!"
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asm_text: "vst20.32 {q0, q1}, [r0]"
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asm_text: "vst20.32 {q0, q1}, [r0]!"
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asm_text: "vst20.32 {q0, q1}, [r11]"
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asm_text: "vst20.32 {q5, q6}, [r0]!"
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asm_text: "vst21.32 {q0, q1}, [r0]"
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asm_text: "vst21.32 {q3, q4}, [r0]!"
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asm_text: "vld40.8 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld40.8 {q0, q1, q2, q3}, [r0]!"
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asm_text: "vld40.8 {q0, q1, q2, q3}, [r11]"
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asm_text: "vld40.8 {q3, q4, q5, q6}, [r0]!"
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asm_text: "vld41.8 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld41.8 {q4, q5, q6, q7}, [r0]!"
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asm_text: "vld42.8 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld42.8 {q0, q1, q2, q3}, [r0]!"
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asm_text: "vld43.8 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld43.8 {q4, q5, q6, q7}, [r0]!"
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asm_text: "vld40.16 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld40.16 {q0, q1, q2, q3}, [r0]!"
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asm_text: "vld40.16 {q0, q1, q2, q3}, [r11]"
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asm_text: "vld40.16 {q3, q4, q5, q6}, [r0]!"
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asm_text: "vld41.16 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld41.16 {q4, q5, q6, q7}, [r0]!"
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asm_text: "vld42.16 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld42.16 {q0, q1, q2, q3}, [r0]!"
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asm_text: "vld43.16 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld43.16 {q4, q5, q6, q7}, [r0]!"
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asm_text: "vld40.32 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld40.32 {q0, q1, q2, q3}, [r0]!"
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asm_text: "vld40.32 {q0, q1, q2, q3}, [r11]"
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asm_text: "vld40.32 {q3, q4, q5, q6}, [r0]!"
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asm_text: "vld41.32 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld41.32 {q4, q5, q6, q7}, [r0]!"
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asm_text: "vld42.32 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld42.32 {q0, q1, q2, q3}, [r0]!"
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asm_text: "vld43.32 {q0, q1, q2, q3}, [r0]"
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asm_text: "vld43.32 {q4, q5, q6, q7}, [r0]!"
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