mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
69 lines
2.4 KiB
YAML
69 lines
2.4 KiB
YAML
test_cases:
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input:
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bytes: [ 0x50, 0xea, 0xef, 0x51, 0x5e, 0xea, 0xef, 0x61, 0x50, 0xea, 0x2d, 0x41, 0x52, 0xea, 0x22, 0x9e, 0x57, 0xea, 0x47, 0x9e, 0x5c, 0xea, 0x3c, 0xae, 0x5a, 0xea, 0x3a, 0xbe, 0x59, 0xea, 0x7b, 0x89, 0x5f, 0xea, 0x1f, 0x9e, 0x5f, 0xea, 0x3f, 0xae, 0x5a, 0xea, 0xd7, 0x9e, 0x55, 0xea, 0x2f, 0xae, 0x52, 0xea, 0x42, 0xae, 0x51, 0xea, 0x7b, 0xbe, 0x5e, 0xea, 0xcf, 0x21, 0x5e, 0xea, 0x0d, 0x41, 0x5e, 0xea, 0x1f, 0x31, 0x5e, 0xea, 0x2d, 0xcf, 0x5b, 0xea, 0x2d, 0xcf, 0x5f, 0xea, 0x2d, 0x83, 0x5e, 0xea, 0x7f, 0x4f, 0x5f, 0xea, 0x3f, 0x7b, 0x5e, 0xea, 0xef, 0x2f, 0x5f, 0xea, 0xef, 0x5b, 0x5e, 0xea, 0x0d, 0x1f, 0x5f, 0xea, 0x8d, 0x41, 0x50, 0xea, 0x4f, 0x0f, 0x5f, 0xea, 0xcf, 0x17, 0x50, 0xea, 0x9f, 0x2f, 0x51, 0xea, 0x5f, 0x79 ]
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arch: "CS_ARCH_ARM"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_MCLASS", "CS_MODE_V8", "CS_MODE_THUMB" ]
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expected:
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insns:
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asm_text: "asrl r0, r1, #0x17"
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asm_text: "asrl lr, r1, #0x1b"
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asm_text: "asrl r0, r1, r4"
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asm_text: "cinc lr, r2, lo"
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asm_text: "cinc lr, r7, pl"
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asm_text: "cinv lr, r12, hs"
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asm_text: "cneg lr, r10, hs"
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asm_text: "csel r9, r9, r11, vc"
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asm_text: "cset lr, eq"
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asm_text: "csetm lr, hs"
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asm_text: "csinc lr, r10, r7, le"
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asm_text: "csinv lr, r5, zr, hs"
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asm_text: "cinv lr, r2, pl"
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asm_text: "csneg lr, r1, r11, vc"
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asm_text: "lsll lr, r1, #0xb"
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asm_text: "lsll lr, r1, r4"
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asm_text: "lsrl lr, r1, #0xc"
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asm_text: "sqrshr lr, r12"
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asm_text: "sqrshr r11, r12"
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asm_text: "sqrshrl lr, r3, #0x40, r8"
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asm_text: "sqshl lr, #0x11"
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asm_text: "sqshll lr, r11, #0x1c"
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asm_text: "srshr lr, #0xb"
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asm_text: "srshrl lr, r11, #0x17"
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asm_text: "uqrshl lr, r1"
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asm_text: "uqrshll lr, r1, #0x30, r4"
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asm_text: "uqshl r0, #1"
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asm_text: "uqshll lr, r7, #7"
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asm_text: "urshr r0, #0xa"
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asm_text: "urshrl r0, r9, #0x1d"
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