mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
245 lines
9.2 KiB
YAML
245 lines
9.2 KiB
YAML
test_cases:
|
|
-
|
|
input:
|
|
bytes: [ 0xa0, 0x08, 0x41, 0xf2, 0xa0, 0x08, 0x51, 0xf2, 0xa0, 0x08, 0x71, 0xf2, 0xa0, 0x08, 0x61, 0xf2, 0xa1, 0x0d, 0x40, 0xf2, 0xe2, 0x0d, 0x40, 0xf2, 0xa0, 0x00, 0xc1, 0xf2, 0xa0, 0x00, 0xd1, 0xf2, 0xa0, 0x00, 0xe1, 0xf2, 0xa0, 0x00, 0xc1, 0xf3, 0xa0, 0x00, 0xd1, 0xf3, 0xa0, 0x00, 0xe1, 0xf3, 0xa2, 0x01, 0xc0, 0xf2, 0xa2, 0x01, 0xd0, 0xf2, 0xa2, 0x01, 0xe0, 0xf2, 0xa2, 0x01, 0xc0, 0xf3, 0xa2, 0x01, 0xd0, 0xf3, 0xa2, 0x01, 0xe0, 0xf3, 0xa1, 0x00, 0x40, 0xf2, 0xa1, 0x00, 0x50, 0xf2, 0xa1, 0x00, 0x60, 0xf2, 0xa1, 0x00, 0x40, 0xf3, 0xa1, 0x00, 0x50, 0xf3, 0xa1, 0x00, 0x60, 0xf3, 0xe2, 0x00, 0x40, 0xf2, 0xe2, 0x00, 0x50, 0xf2, 0xe2, 0x00, 0x60, 0xf2, 0xe2, 0x00, 0x40, 0xf3, 0xe2, 0x00, 0x50, 0xf3, 0xe2, 0x00, 0x60, 0xf3, 0x28, 0xb0, 0x0b, 0xf2, 0x27, 0xc0, 0x1c, 0xf2, 0x26, 0xd0, 0x2d, 0xf2, 0x25, 0xe0, 0x0e, 0xf3, 0x24, 0xf0, 0x1f, 0xf3, 0xa3, 0x00, 0x60, 0xf3, 0x68, 0x20, 0x02, 0xf2, 0x66, 0x40, 0x14, 0xf2, 0x64, 0x60, 0x26, 0xf2, 0x62, 0x80, 0x08, 0xf3, 0x60, 0xa0, 0x1a, 0xf3, 0x4e, 0xc0, 0x2c, 0xf3, 0xa1, 0x01, 0x40, 0xf2, 0xa1, 0x01, 0x50, 0xf2, 0xa1, 0x01, 0x60, 0xf2, 0xa1, 0x01, 0x40, 0xf3, 0xa1, 0x01, 0x50, 0xf3, 0xa1, 0x01, 0x60, 0xf3, 0xe2, 0x01, 0x40, 0xf2, 0xe2, 0x01, 0x50, 0xf2, 0xe2, 0x01, 0x60, 0xf2, 0xe2, 0x01, 0x40, 0xf3, 0xe2, 0x01, 0x50, 0xf3, 0xe2, 0x01, 0x60, 0xf3, 0xa1, 0x01, 0x40, 0xf2, 0xa1, 0x01, 0x50, 0xf2, 0xa1, 0x01, 0x60, 0xf2, 0xa1, 0x01, 0x40, 0xf3, 0xa1, 0x01, 0x50, 0xf3, 0xa1, 0x01, 0x60, 0xf3, 0xe2, 0x01, 0x40, 0xf2, 0xe2, 0x01, 0x50, 0xf2, 0xe2, 0x01, 0x60, 0xf2, 0xe2, 0x01, 0x40, 0xf3, 0xe2, 0x01, 0x50, 0xf3, 0xe2, 0x01, 0x60, 0xf3, 0xb1, 0x00, 0x40, 0xf2, 0xb1, 0x00, 0x50, 0xf2, 0xb1, 0x00, 0x60, 0xf2, 0xb1, 0x00, 0x70, 0xf2, 0xb1, 0x00, 0x40, 0xf3, 0xb1, 0x00, 0x50, 0xf3, 0xb1, 0x00, 0x60, 0xf3, 0xb1, 0x00, 0x70, 0xf3, 0xf2, 0x00, 0x40, 0xf2, 0xf2, 0x00, 0x50, 0xf2, 0xf2, 0x00, 0x60, 0xf2, 0xf2, 0x00, 0x70, 0xf2, 0xf2, 0x00, 0x40, 0xf3, 0xf2, 0x00, 0x50, 0xf3, 0xf2, 0x00, 0x60, 0xf3, 0xf2, 0x00, 0x70, 0xf3, 0xb1, 0x00, 0x40, 0xf2, 0xb1, 0x00, 0x50, 0xf2, 0xb1, 0x00, 0x60, 0xf2, 0xb1, 0x00, 0x70, 0xf2, 0xb1, 0x00, 0x40, 0xf3, 0xb1, 0x00, 0x50, 0xf3, 0xb1, 0x00, 0x60, 0xf3, 0xb1, 0x00, 0x70, 0xf3, 0xf2, 0x00, 0x40, 0xf2, 0xf2, 0x00, 0x50, 0xf2, 0xf2, 0x00, 0x60, 0xf2, 0xf2, 0x00, 0x70, 0xf2, 0xf2, 0x00, 0x40, 0xf3, 0xf2, 0x00, 0x50, 0xf3, 0xf2, 0x00, 0x60, 0xf3, 0xf2, 0x00, 0x70, 0xf3, 0xa2, 0x04, 0xc0, 0xf2, 0xa2, 0x04, 0xd0, 0xf2, 0xa2, 0x04, 0xe0, 0xf2, 0xa2, 0x04, 0xc0, 0xf3, 0xa2, 0x04, 0xd0, 0xf3, 0xa2, 0x04, 0xe0, 0xf3, 0x05, 0x68, 0x06, 0xf2, 0x01, 0x78, 0x17, 0xf2, 0x02, 0x88, 0x28, 0xf2, 0x03, 0x98, 0x39, 0xf2, 0x4a, 0xc8, 0x0c, 0xf2, 0x42, 0xe8, 0x1e, 0xf2, 0xc4, 0x08, 0x60, 0xf2, 0xc6, 0x28, 0x72, 0xf2, 0x05, 0xc1, 0x8c, 0xf2, 0x01, 0xe1, 0x9e, 0xf2, 0x82, 0x01, 0xe0, 0xf2, 0x05, 0xc1, 0x8c, 0xf3, 0x01, 0xe1, 0x9e, 0xf3, 0x82, 0x01, 0xe0, 0xf3 ]
|
|
arch: "CS_ARCH_ARM"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_ARM" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "vadd.i8 d16, d17, d16"
|
|
-
|
|
asm_text: "vadd.i16 d16, d17, d16"
|
|
-
|
|
asm_text: "vadd.i64 d16, d17, d16"
|
|
-
|
|
asm_text: "vadd.i32 d16, d17, d16"
|
|
-
|
|
asm_text: "vadd.f32 d16, d16, d17"
|
|
-
|
|
asm_text: "vadd.f32 q8, q8, q9"
|
|
-
|
|
asm_text: "vaddl.s8 q8, d17, d16"
|
|
-
|
|
asm_text: "vaddl.s16 q8, d17, d16"
|
|
-
|
|
asm_text: "vaddl.s32 q8, d17, d16"
|
|
-
|
|
asm_text: "vaddl.u8 q8, d17, d16"
|
|
-
|
|
asm_text: "vaddl.u16 q8, d17, d16"
|
|
-
|
|
asm_text: "vaddl.u32 q8, d17, d16"
|
|
-
|
|
asm_text: "vaddw.s8 q8, q8, d18"
|
|
-
|
|
asm_text: "vaddw.s16 q8, q8, d18"
|
|
-
|
|
asm_text: "vaddw.s32 q8, q8, d18"
|
|
-
|
|
asm_text: "vaddw.u8 q8, q8, d18"
|
|
-
|
|
asm_text: "vaddw.u16 q8, q8, d18"
|
|
-
|
|
asm_text: "vaddw.u32 q8, q8, d18"
|
|
-
|
|
asm_text: "vhadd.s8 d16, d16, d17"
|
|
-
|
|
asm_text: "vhadd.s16 d16, d16, d17"
|
|
-
|
|
asm_text: "vhadd.s32 d16, d16, d17"
|
|
-
|
|
asm_text: "vhadd.u8 d16, d16, d17"
|
|
-
|
|
asm_text: "vhadd.u16 d16, d16, d17"
|
|
-
|
|
asm_text: "vhadd.u32 d16, d16, d17"
|
|
-
|
|
asm_text: "vhadd.s8 q8, q8, q9"
|
|
-
|
|
asm_text: "vhadd.s16 q8, q8, q9"
|
|
-
|
|
asm_text: "vhadd.s32 q8, q8, q9"
|
|
-
|
|
asm_text: "vhadd.u8 q8, q8, q9"
|
|
-
|
|
asm_text: "vhadd.u16 q8, q8, q9"
|
|
-
|
|
asm_text: "vhadd.u32 q8, q8, q9"
|
|
-
|
|
asm_text: "vhadd.s8 d11, d11, d24"
|
|
-
|
|
asm_text: "vhadd.s16 d12, d12, d23"
|
|
-
|
|
asm_text: "vhadd.s32 d13, d13, d22"
|
|
-
|
|
asm_text: "vhadd.u8 d14, d14, d21"
|
|
-
|
|
asm_text: "vhadd.u16 d15, d15, d20"
|
|
-
|
|
asm_text: "vhadd.u32 d16, d16, d19"
|
|
-
|
|
asm_text: "vhadd.s8 q1, q1, q12"
|
|
-
|
|
asm_text: "vhadd.s16 q2, q2, q11"
|
|
-
|
|
asm_text: "vhadd.s32 q3, q3, q10"
|
|
-
|
|
asm_text: "vhadd.u8 q4, q4, q9"
|
|
-
|
|
asm_text: "vhadd.u16 q5, q5, q8"
|
|
-
|
|
asm_text: "vhadd.u32 q6, q6, q7"
|
|
-
|
|
asm_text: "vrhadd.s8 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.s16 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.s32 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.u8 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.u16 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.u32 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.s8 q8, q8, q9"
|
|
-
|
|
asm_text: "vrhadd.s16 q8, q8, q9"
|
|
-
|
|
asm_text: "vrhadd.s32 q8, q8, q9"
|
|
-
|
|
asm_text: "vrhadd.u8 q8, q8, q9"
|
|
-
|
|
asm_text: "vrhadd.u16 q8, q8, q9"
|
|
-
|
|
asm_text: "vrhadd.u32 q8, q8, q9"
|
|
-
|
|
asm_text: "vrhadd.s8 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.s16 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.s32 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.u8 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.u16 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.u32 d16, d16, d17"
|
|
-
|
|
asm_text: "vrhadd.s8 q8, q8, q9"
|
|
-
|
|
asm_text: "vrhadd.s16 q8, q8, q9"
|
|
-
|
|
asm_text: "vrhadd.s32 q8, q8, q9"
|
|
-
|
|
asm_text: "vrhadd.u8 q8, q8, q9"
|
|
-
|
|
asm_text: "vrhadd.u16 q8, q8, q9"
|
|
-
|
|
asm_text: "vrhadd.u32 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.s8 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.s16 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.s32 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.s64 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.u8 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.u16 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.u32 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.u64 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.s8 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.s16 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.s32 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.s64 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.u8 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.u16 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.u32 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.u64 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.s8 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.s16 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.s32 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.s64 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.u8 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.u16 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.u32 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.u64 d16, d16, d17"
|
|
-
|
|
asm_text: "vqadd.s8 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.s16 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.s32 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.s64 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.u8 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.u16 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.u32 q8, q8, q9"
|
|
-
|
|
asm_text: "vqadd.u64 q8, q8, q9"
|
|
-
|
|
asm_text: "vaddhn.i16 d16, q8, q9"
|
|
-
|
|
asm_text: "vaddhn.i32 d16, q8, q9"
|
|
-
|
|
asm_text: "vaddhn.i64 d16, q8, q9"
|
|
-
|
|
asm_text: "vraddhn.i16 d16, q8, q9"
|
|
-
|
|
asm_text: "vraddhn.i32 d16, q8, q9"
|
|
-
|
|
asm_text: "vraddhn.i64 d16, q8, q9"
|
|
-
|
|
asm_text: "vadd.i8 d6, d6, d5"
|
|
-
|
|
asm_text: "vadd.i16 d7, d7, d1"
|
|
-
|
|
asm_text: "vadd.i32 d8, d8, d2"
|
|
-
|
|
asm_text: "vadd.i64 d9, d9, d3"
|
|
-
|
|
asm_text: "vadd.i8 q6, q6, q5"
|
|
-
|
|
asm_text: "vadd.i16 q7, q7, q1"
|
|
-
|
|
asm_text: "vadd.i32 q8, q8, q2"
|
|
-
|
|
asm_text: "vadd.i64 q9, q9, q3"
|
|
-
|
|
asm_text: "vaddw.s8 q6, q6, d5"
|
|
-
|
|
asm_text: "vaddw.s16 q7, q7, d1"
|
|
-
|
|
asm_text: "vaddw.s32 q8, q8, d2"
|
|
-
|
|
asm_text: "vaddw.u8 q6, q6, d5"
|
|
-
|
|
asm_text: "vaddw.u16 q7, q7, d1"
|
|
-
|
|
asm_text: "vaddw.u32 q8, q8, d2"
|