mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
311 lines
11 KiB
YAML
311 lines
11 KiB
YAML
test_cases:
|
|
-
|
|
input:
|
|
bytes: [ 0xb0, 0x01, 0x41, 0xf2, 0xf2, 0x01, 0x40, 0xf2, 0xb0, 0x01, 0x41, 0xf3, 0xf2, 0x01, 0x40, 0xf3, 0xb0, 0x01, 0x61, 0xf2, 0xf2, 0x01, 0x60, 0xf2, 0x11, 0x07, 0xc0, 0xf2, 0x51, 0x07, 0xc0, 0xf2, 0x50, 0x01, 0xc0, 0xf2, 0xb0, 0x01, 0x51, 0xf2, 0xf2, 0x01, 0x50, 0xf2, 0xf6, 0x41, 0x54, 0xf2, 0x11, 0x91, 0x19, 0xf2, 0x3f, 0x0b, 0xc7, 0xf3, 0x7f, 0x0b, 0xc7, 0xf3, 0x3f, 0x09, 0xc7, 0xf3, 0x7f, 0x09, 0xc7, 0xf3, 0x3f, 0x07, 0xc7, 0xf3, 0x7f, 0x07, 0xc7, 0xf3, 0x3f, 0x05, 0xc7, 0xf3, 0x7f, 0x05, 0xc7, 0xf3, 0x3f, 0x03, 0xc7, 0xf3, 0x7f, 0x03, 0xc7, 0xf3, 0x3f, 0x01, 0xc7, 0xf3, 0x7f, 0x01, 0xc7, 0xf3, 0x3c, 0xa9, 0x87, 0xf3, 0x7c, 0x49, 0xc7, 0xf3, 0x3c, 0xab, 0x87, 0xf3, 0x7c, 0x4b, 0xc7, 0xf3, 0x3c, 0xa7, 0x87, 0xf3, 0x7c, 0x47, 0xc7, 0xf3, 0x3c, 0xa5, 0x87, 0xf3, 0x7c, 0x45, 0xc7, 0xf3, 0x3c, 0xa3, 0x87, 0xf3, 0x7c, 0x43, 0xc7, 0xf3, 0x3c, 0xa1, 0x87, 0xf3, 0x7c, 0x41, 0xc7, 0xf3, 0xb0, 0x01, 0x71, 0xf2, 0xf2, 0x01, 0x70, 0xf2, 0xa0, 0x05, 0xf0, 0xf3, 0xe0, 0x05, 0xf0, 0xf3, 0xb0, 0x21, 0x51, 0xf3, 0xf2, 0x01, 0x54, 0xf3, 0xb0, 0x21, 0x61, 0xf3, 0xf2, 0x01, 0x64, 0xf3, 0xb0, 0x21, 0x71, 0xf3, 0xf2, 0x01, 0x74, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x56, 0x81, 0x0e, 0xf3, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x07, 0xf2, 0x13, 0x41, 0x27, 0xf2, 0x13, 0x41, 0x27, 0xf2, 0x13, 0x41, 0x27, 0xf2, 0x13, 0x41, 0x27, 0xf2, 0x13, 0x41, 0x27, 0xf2, 0x13, 0x41, 0x27, 0xf2, 0x13, 0x41, 0x27, 0xf2, 0x13, 0x41, 0x27, 0xf2, 0x13, 0x41, 0x27, 0xf2, 0x13, 0x41, 0x27, 0xf2, 0x13, 0x41, 0x27, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x56, 0x81, 0x2e, 0xf2, 0x5a, 0xc1, 0x0c, 0xf2, 0x5a, 0xc1, 0x0c, 0xf2, 0x52, 0xe1, 0x0e, 0xf2, 0xd4, 0x01, 0x40, 0xf2, 0xd4, 0x01, 0x40, 0xf2, 0x5a, 0xc1, 0x0c, 0xf3, 0x5a, 0xc1, 0x0c, 0xf3, 0x52, 0xe1, 0x0e, 0xf3, 0xd4, 0x01, 0x40, 0xf3, 0xd4, 0x01, 0x40, 0xf3, 0x5a, 0xc1, 0x0c, 0xf3, 0x5a, 0xc1, 0x0c, 0xf3, 0x52, 0xe1, 0x0e, 0xf3, 0xd4, 0x01, 0x40, 0xf3, 0xd4, 0x01, 0x40, 0xf3, 0x4a, 0xa2, 0xb5, 0xf3, 0x05, 0x52, 0xb5, 0xf3, 0x56, 0xa8, 0x1a, 0xf3, 0x13, 0x58, 0x15, 0xf3, 0x46, 0xa3, 0x1a, 0xf2, 0x03, 0x53, 0x15, 0xf2, 0x56, 0xa3, 0x1a, 0xf2, 0x13, 0x53, 0x15, 0xf2, 0x4a, 0xa0, 0xb5, 0xf3, 0x05, 0x50, 0xb5, 0xf3, 0xca, 0xa0, 0xb5, 0xf3, 0x85, 0x50, 0xb5, 0xf3, 0x4a, 0xa1, 0xb5, 0xf3, 0x05, 0x51, 0xb5, 0xf3, 0xca, 0xa1, 0xb5, 0xf3, 0x85, 0x51, 0xb5, 0xf3, 0x3e, 0x5e, 0x05, 0xf3, 0x56, 0xae, 0x0a, 0xf3, 0x3e, 0x5e, 0x25, 0xf3, 0x56, 0xae, 0x2a, 0xf3 ]
|
|
arch: "CS_ARCH_ARM"
|
|
options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_ARM" ]
|
|
expected:
|
|
insns:
|
|
-
|
|
asm_text: "vand d16, d17, d16"
|
|
-
|
|
asm_text: "vand q8, q8, q9"
|
|
-
|
|
asm_text: "veor d16, d17, d16"
|
|
-
|
|
asm_text: "veor q8, q8, q9"
|
|
-
|
|
asm_text: "vorr d16, d17, d16"
|
|
-
|
|
asm_text: "vorr q8, q8, q9"
|
|
-
|
|
asm_text: "vorr.i32 d16, #0x1000000"
|
|
-
|
|
asm_text: "vorr.i32 q8, #0x1000000"
|
|
-
|
|
asm_text: "vorr.i32 q8, #0x0"
|
|
-
|
|
asm_text: "vbic d16, d17, d16"
|
|
-
|
|
asm_text: "vbic q8, q8, q9"
|
|
-
|
|
asm_text: "vbic q10, q10, q11"
|
|
-
|
|
asm_text: "vbic d9, d9, d1"
|
|
-
|
|
asm_text: "vbic.i16 d16, #0xff00"
|
|
-
|
|
asm_text: "vbic.i16 q8, #0xff00"
|
|
-
|
|
asm_text: "vbic.i16 d16, #0xff"
|
|
-
|
|
asm_text: "vbic.i16 q8, #0xff"
|
|
-
|
|
asm_text: "vbic.i32 d16, #0xff000000"
|
|
-
|
|
asm_text: "vbic.i32 q8, #0xff000000"
|
|
-
|
|
asm_text: "vbic.i32 d16, #0xff0000"
|
|
-
|
|
asm_text: "vbic.i32 q8, #0xff0000"
|
|
-
|
|
asm_text: "vbic.i32 d16, #0xff00"
|
|
-
|
|
asm_text: "vbic.i32 q8, #0xff00"
|
|
-
|
|
asm_text: "vbic.i32 d16, #0xff"
|
|
-
|
|
asm_text: "vbic.i32 q8, #0xff"
|
|
-
|
|
asm_text: "vbic.i16 d10, #0xfc"
|
|
-
|
|
asm_text: "vbic.i16 q10, #0xfc"
|
|
-
|
|
asm_text: "vbic.i16 d10, #0xfc00"
|
|
-
|
|
asm_text: "vbic.i16 q10, #0xfc00"
|
|
-
|
|
asm_text: "vbic.i32 d10, #0xfc000000"
|
|
-
|
|
asm_text: "vbic.i32 q10, #0xfc000000"
|
|
-
|
|
asm_text: "vbic.i32 d10, #0xfc0000"
|
|
-
|
|
asm_text: "vbic.i32 q10, #0xfc0000"
|
|
-
|
|
asm_text: "vbic.i32 d10, #0xfc00"
|
|
-
|
|
asm_text: "vbic.i32 q10, #0xfc00"
|
|
-
|
|
asm_text: "vbic.i32 d10, #0xfc"
|
|
-
|
|
asm_text: "vbic.i32 q10, #0xfc"
|
|
-
|
|
asm_text: "vorn d16, d17, d16"
|
|
-
|
|
asm_text: "vorn q8, q8, q9"
|
|
-
|
|
asm_text: "vmvn d16, d16"
|
|
-
|
|
asm_text: "vmvn q8, q8"
|
|
-
|
|
asm_text: "vbsl d18, d17, d16"
|
|
-
|
|
asm_text: "vbsl q8, q10, q9"
|
|
-
|
|
asm_text: "vbit d18, d17, d16"
|
|
-
|
|
asm_text: "vbit q8, q10, q9"
|
|
-
|
|
asm_text: "vbif d18, d17, d16"
|
|
-
|
|
asm_text: "vbif q8, q10, q9"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "veor q4, q7, q3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vand d4, d7, d3"
|
|
-
|
|
asm_text: "vorr d4, d7, d3"
|
|
-
|
|
asm_text: "vorr d4, d7, d3"
|
|
-
|
|
asm_text: "vorr d4, d7, d3"
|
|
-
|
|
asm_text: "vorr d4, d7, d3"
|
|
-
|
|
asm_text: "vorr d4, d7, d3"
|
|
-
|
|
asm_text: "vorr d4, d7, d3"
|
|
-
|
|
asm_text: "vorr d4, d7, d3"
|
|
-
|
|
asm_text: "vorr d4, d7, d3"
|
|
-
|
|
asm_text: "vorr d4, d7, d3"
|
|
-
|
|
asm_text: "vorr d4, d7, d3"
|
|
-
|
|
asm_text: "vorr d4, d7, d3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vorr q4, q7, q3"
|
|
-
|
|
asm_text: "vand q6, q6, q5"
|
|
-
|
|
asm_text: "vand q6, q6, q5"
|
|
-
|
|
asm_text: "vand q7, q7, q1"
|
|
-
|
|
asm_text: "vand q8, q8, q2"
|
|
-
|
|
asm_text: "vand q8, q8, q2"
|
|
-
|
|
asm_text: "veor q6, q6, q5"
|
|
-
|
|
asm_text: "veor q6, q6, q5"
|
|
-
|
|
asm_text: "veor q7, q7, q1"
|
|
-
|
|
asm_text: "veor q8, q8, q2"
|
|
-
|
|
asm_text: "veor q8, q8, q2"
|
|
-
|
|
asm_text: "veor q6, q6, q5"
|
|
-
|
|
asm_text: "veor q6, q6, q5"
|
|
-
|
|
asm_text: "veor q7, q7, q1"
|
|
-
|
|
asm_text: "veor q8, q8, q2"
|
|
-
|
|
asm_text: "veor q8, q8, q2"
|
|
-
|
|
asm_text: "vclt.s16 q5, q5, #0"
|
|
-
|
|
asm_text: "vclt.s16 d5, d5, #0"
|
|
-
|
|
asm_text: "vceq.i16 q5, q5, q3"
|
|
-
|
|
asm_text: "vceq.i16 d5, d5, d3"
|
|
-
|
|
asm_text: "vcgt.s16 q5, q5, q3"
|
|
-
|
|
asm_text: "vcgt.s16 d5, d5, d3"
|
|
-
|
|
asm_text: "vcge.s16 q5, q5, q3"
|
|
-
|
|
asm_text: "vcge.s16 d5, d5, d3"
|
|
-
|
|
asm_text: "vcgt.s16 q5, q5, #0"
|
|
-
|
|
asm_text: "vcgt.s16 d5, d5, #0"
|
|
-
|
|
asm_text: "vcge.s16 q5, q5, #0"
|
|
-
|
|
asm_text: "vcge.s16 d5, d5, #0"
|
|
-
|
|
asm_text: "vceq.i16 q5, q5, #0"
|
|
-
|
|
asm_text: "vceq.i16 d5, d5, #0"
|
|
-
|
|
asm_text: "vcle.s16 q5, q5, #0"
|
|
-
|
|
asm_text: "vcle.s16 d5, d5, #0"
|
|
-
|
|
asm_text: "vacge.f32 d5, d5, d30"
|
|
-
|
|
asm_text: "vacge.f32 q5, q5, q3"
|
|
-
|
|
asm_text: "vacgt.f32 d5, d5, d30"
|
|
-
|
|
asm_text: "vacgt.f32 q5, q5, q3"
|