mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-10 09:35:06 +00:00
159 lines
5.6 KiB
YAML
159 lines
5.6 KiB
YAML
test_cases:
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input:
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bytes: [ 0x18, 0x0e, 0xc0, 0xf2, 0x10, 0x08, 0xc1, 0xf2, 0x10, 0x0a, 0xc1, 0xf2, 0x10, 0x00, 0xc2, 0xf2, 0x10, 0x02, 0xc2, 0xf2, 0x10, 0x04, 0xc2, 0xf2, 0x10, 0x06, 0xc2, 0xf2, 0x10, 0x0c, 0xc2, 0xf2, 0x10, 0x0d, 0xc2, 0xf2, 0x33, 0x0e, 0xc1, 0xf3, 0x58, 0x0e, 0xc0, 0xf2, 0x50, 0x08, 0xc1, 0xf2, 0x50, 0x0a, 0xc1, 0xf2, 0x50, 0x00, 0xc2, 0xf2, 0x50, 0x02, 0xc2, 0xf2, 0x50, 0x04, 0xc2, 0xf2, 0x50, 0x06, 0xc2, 0xf2, 0x50, 0x0c, 0xc2, 0xf2, 0x50, 0x0d, 0xc2, 0xf2, 0x73, 0x0e, 0xc1, 0xf3, 0x30, 0x08, 0xc1, 0xf2, 0x30, 0x0a, 0xc1, 0xf2, 0x30, 0x00, 0xc2, 0xf2, 0x30, 0x02, 0xc2, 0xf2, 0x30, 0x04, 0xc2, 0xf2, 0x30, 0x06, 0xc2, 0xf2, 0x30, 0x0c, 0xc2, 0xf2, 0x30, 0x0d, 0xc2, 0xf2, 0x30, 0x0a, 0xc8, 0xf2, 0x30, 0x0a, 0xd0, 0xf2, 0x30, 0x0a, 0xe0, 0xf2, 0x30, 0x0a, 0xc8, 0xf3, 0x30, 0x0a, 0xd0, 0xf3, 0x30, 0x0a, 0xe0, 0xf3, 0x20, 0x02, 0xf2, 0xf3, 0x20, 0x02, 0xf6, 0xf3, 0x20, 0x02, 0xfa, 0xf3, 0xa0, 0x02, 0xf2, 0xf3, 0xa0, 0x02, 0xf6, 0xf3, 0xa0, 0x02, 0xfa, 0xf3, 0xe0, 0x02, 0xf2, 0xf3, 0xe0, 0x02, 0xf6, 0xf3, 0xe0, 0x02, 0xfa, 0xf3, 0x60, 0x02, 0xf2, 0xf3, 0x60, 0x02, 0xf6, 0xf3, 0x60, 0x02, 0xfa, 0xf3, 0xb0, 0x0b, 0x50, 0xee, 0xf0, 0x0b, 0x10, 0xee, 0xb0, 0x0b, 0xd0, 0xee, 0xf0, 0x0b, 0x90, 0xee, 0x90, 0x0b, 0x30, 0xee, 0xb0, 0x1b, 0x40, 0xee, 0xf0, 0x1b, 0x00, 0xee, 0x90, 0x1b, 0x20, 0xee, 0xb0, 0x1b, 0x42, 0xee, 0xf0, 0x1b, 0x02, 0xee, 0x90, 0x1b, 0x22, 0xee, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3, 0x82, 0x15, 0xb0, 0xf3 ]
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arch: "CS_ARCH_ARM"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_ARM" ]
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expected:
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insns:
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asm_text: "vmov.i8 d16, #0x8"
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asm_text: "vmov.i16 d16, #0x10"
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asm_text: "vmov.i16 d16, #0x1000"
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asm_text: "vmov.i32 d16, #0x20"
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asm_text: "vmov.i32 d16, #0x2000"
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asm_text: "vmov.i32 d16, #0x200000"
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asm_text: "vmov.i32 d16, #0x20000000"
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asm_text: "vmov.i32 d16, #0x20ff"
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asm_text: "vmov.i32 d16, #0x20ffff"
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asm_text: "vmov.i64 d16, #0xff0000ff0000ffff"
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asm_text: "vmov.i8 q8, #0x8"
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asm_text: "vmov.i16 q8, #0x10"
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asm_text: "vmov.i16 q8, #0x1000"
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asm_text: "vmov.i32 q8, #0x20"
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asm_text: "vmov.i32 q8, #0x2000"
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asm_text: "vmov.i32 q8, #0x200000"
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asm_text: "vmov.i32 q8, #0x20000000"
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asm_text: "vmov.i32 q8, #0x20ff"
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asm_text: "vmov.i32 q8, #0x20ffff"
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asm_text: "vmov.i64 q8, #0xff0000ff0000ffff"
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asm_text: "vmvn.i16 d16, #0x10"
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asm_text: "vmvn.i16 d16, #0x1000"
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asm_text: "vmvn.i32 d16, #0x20"
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asm_text: "vmvn.i32 d16, #0x2000"
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asm_text: "vmvn.i32 d16, #0x200000"
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asm_text: "vmvn.i32 d16, #0x20000000"
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asm_text: "vmvn.i32 d16, #0x20ff"
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asm_text: "vmvn.i32 d16, #0x20ffff"
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asm_text: "vmovl.s8 q8, d16"
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asm_text: "vmovl.s16 q8, d16"
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asm_text: "vmovl.s32 q8, d16"
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asm_text: "vmovl.u8 q8, d16"
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asm_text: "vmovl.u16 q8, d16"
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asm_text: "vmovl.u32 q8, d16"
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asm_text: "vmovn.i16 d16, q8"
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asm_text: "vmovn.i32 d16, q8"
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asm_text: "vmovn.i64 d16, q8"
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asm_text: "vqmovn.s16 d16, q8"
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asm_text: "vqmovn.s32 d16, q8"
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asm_text: "vqmovn.s64 d16, q8"
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asm_text: "vqmovn.u16 d16, q8"
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asm_text: "vqmovn.u32 d16, q8"
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asm_text: "vqmovn.u64 d16, q8"
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asm_text: "vqmovun.s16 d16, q8"
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asm_text: "vqmovun.s32 d16, q8"
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asm_text: "vqmovun.s64 d16, q8"
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asm_text: "vmov.s8 r0, d16[1]"
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asm_text: "vmov.s16 r0, d16[1]"
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asm_text: "vmov.u8 r0, d16[1]"
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asm_text: "vmov.u16 r0, d16[1]"
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asm_text: "vmov.32 r0, d16[1]"
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asm_text: "vmov.8 d16[1], r1"
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asm_text: "vmov.16 d16[1], r1"
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asm_text: "vmov.32 d16[1], r1"
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asm_text: "vmov.8 d18[1], r1"
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asm_text: "vmov.16 d18[1], r1"
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asm_text: "vmov.32 d18[1], r1"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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asm_text: "vmvn d1, d2"
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