mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
33 lines
1.1 KiB
YAML
33 lines
1.1 KiB
YAML
test_cases:
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input:
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bytes: [ 0x20, 0x04, 0xfb, 0xf3, 0x60, 0x04, 0xfb, 0xf3, 0x20, 0x05, 0xfb, 0xf3, 0x60, 0x05, 0xfb, 0xf3, 0xb1, 0x0f, 0x40, 0xf2, 0xf2, 0x0f, 0x40, 0xf2, 0xa0, 0x04, 0xfb, 0xf3, 0xe0, 0x04, 0xfb, 0xf3, 0xa0, 0x05, 0xfb, 0xf3, 0xe0, 0x05, 0xfb, 0xf3, 0xb1, 0x0f, 0x60, 0xf2, 0xf2, 0x0f, 0x60, 0xf2 ]
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arch: "CS_ARCH_ARM"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_ARM" ]
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expected:
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insns:
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asm_text: "vrecpe.u32 d16, d16"
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asm_text: "vrecpe.u32 q8, q8"
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asm_text: "vrecpe.f32 d16, d16"
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asm_text: "vrecpe.f32 q8, q8"
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asm_text: "vrecps.f32 d16, d16, d17"
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asm_text: "vrecps.f32 q8, q8, q9"
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asm_text: "vrsqrte.u32 d16, d16"
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asm_text: "vrsqrte.u32 q8, q8"
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asm_text: "vrsqrte.f32 d16, d16"
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asm_text: "vrsqrte.f32 q8, q8"
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asm_text: "vrsqrts.f32 d16, d16, d17"
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asm_text: "vrsqrts.f32 q8, q8, q9"
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