mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 18:31:03 +00:00
121 lines
4.4 KiB
YAML
121 lines
4.4 KiB
YAML
test_cases:
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input:
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bytes: [ 0x02, 0xef, 0x03, 0x16, 0x15, 0xef, 0x06, 0x46, 0x28, 0xef, 0x09, 0x76, 0x0b, 0xff, 0x0c, 0xa6, 0x1e, 0xff, 0x0f, 0xd6, 0x61, 0xff, 0xa2, 0x06, 0x44, 0xef, 0xa5, 0x3f, 0x02, 0xef, 0x03, 0x26, 0x15, 0xef, 0x06, 0x56, 0x28, 0xef, 0x09, 0x86, 0x0b, 0xff, 0x0c, 0xb6, 0x1e, 0xff, 0x0f, 0xe6, 0x61, 0xff, 0xa2, 0x16, 0x44, 0xef, 0xa5, 0x4f, 0x04, 0xef, 0x46, 0x26, 0x1a, 0xef, 0x4c, 0x86, 0x20, 0xef, 0xe2, 0xe6, 0x46, 0xff, 0xe8, 0x46, 0x5c, 0xff, 0xee, 0xa6, 0x2e, 0xff, 0x60, 0xc6, 0x4a, 0xef, 0x42, 0x2f, 0x04, 0xef, 0x46, 0x46, 0x1a, 0xef, 0x4c, 0xa6, 0x60, 0xef, 0xe2, 0x06, 0x46, 0xff, 0xc4, 0x66, 0x18, 0xff, 0x4a, 0x86, 0x2e, 0xff, 0x60, 0xe6, 0x04, 0xef, 0x42, 0x4f, 0x02, 0xef, 0x13, 0x16, 0x15, 0xef, 0x16, 0x46, 0x28, 0xef, 0x19, 0x76, 0x0b, 0xff, 0x1c, 0xa6, 0x1e, 0xff, 0x1f, 0xd6, 0x61, 0xff, 0xb2, 0x06, 0x64, 0xef, 0xa5, 0x3f, 0x02, 0xef, 0x13, 0x26, 0x15, 0xef, 0x16, 0x56, 0x28, 0xef, 0x19, 0x86, 0x0b, 0xff, 0x1c, 0xb6, 0x1e, 0xff, 0x1f, 0xe6, 0x61, 0xff, 0xb2, 0x16, 0x64, 0xef, 0xa5, 0x4f, 0x04, 0xef, 0x56, 0x26, 0x1a, 0xef, 0x5c, 0x86, 0x20, 0xef, 0xf2, 0xe6, 0x46, 0xff, 0xf8, 0x46, 0x5c, 0xff, 0xfe, 0xa6, 0x2e, 0xff, 0x70, 0xc6, 0x6a, 0xef, 0x42, 0x2f, 0x04, 0xef, 0x56, 0x46, 0x1a, 0xef, 0x5c, 0xa6, 0x60, 0xef, 0xf2, 0x06, 0x46, 0xff, 0xd4, 0x66, 0x18, 0xff, 0x5a, 0x86, 0x2e, 0xff, 0x70, 0xe6, 0x24, 0xef, 0x42, 0x4f ]
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arch: "CS_ARCH_ARM"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "CS_MODE_THUMB" ]
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expected:
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insns:
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asm_text: "vmax.s8 d1, d2, d3"
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asm_text: "vmax.s16 d4, d5, d6"
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asm_text: "vmax.s32 d7, d8, d9"
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asm_text: "vmax.u8 d10, d11, d12"
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asm_text: "vmax.u16 d13, d14, d15"
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asm_text: "vmax.u32 d16, d17, d18"
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asm_text: "vmax.f32 d19, d20, d21"
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asm_text: "vmax.s8 d2, d2, d3"
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asm_text: "vmax.s16 d5, d5, d6"
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asm_text: "vmax.s32 d8, d8, d9"
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asm_text: "vmax.u8 d11, d11, d12"
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asm_text: "vmax.u16 d14, d14, d15"
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asm_text: "vmax.u32 d17, d17, d18"
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asm_text: "vmax.f32 d20, d20, d21"
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asm_text: "vmax.s8 q1, q2, q3"
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asm_text: "vmax.s16 q4, q5, q6"
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asm_text: "vmax.s32 q7, q8, q9"
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asm_text: "vmax.u8 q10, q11, q12"
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asm_text: "vmax.u16 q13, q14, q15"
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asm_text: "vmax.u32 q6, q7, q8"
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asm_text: "vmax.f32 q9, q5, q1"
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asm_text: "vmax.s8 q2, q2, q3"
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asm_text: "vmax.s16 q5, q5, q6"
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asm_text: "vmax.s32 q8, q8, q9"
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asm_text: "vmax.u8 q11, q11, q2"
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asm_text: "vmax.u16 q4, q4, q5"
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asm_text: "vmax.u32 q7, q7, q8"
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asm_text: "vmax.f32 q2, q2, q1"
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asm_text: "vmin.s8 d1, d2, d3"
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asm_text: "vmin.s16 d4, d5, d6"
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asm_text: "vmin.s32 d7, d8, d9"
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asm_text: "vmin.u8 d10, d11, d12"
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asm_text: "vmin.u16 d13, d14, d15"
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asm_text: "vmin.u32 d16, d17, d18"
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asm_text: "vmin.f32 d19, d20, d21"
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asm_text: "vmin.s8 d2, d2, d3"
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asm_text: "vmin.s16 d5, d5, d6"
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asm_text: "vmin.s32 d8, d8, d9"
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asm_text: "vmin.u8 d11, d11, d12"
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asm_text: "vmin.u16 d14, d14, d15"
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asm_text: "vmin.u32 d17, d17, d18"
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asm_text: "vmin.f32 d20, d20, d21"
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asm_text: "vmin.s8 q1, q2, q3"
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asm_text: "vmin.s16 q4, q5, q6"
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asm_text: "vmin.s32 q7, q8, q9"
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asm_text: "vmin.u8 q10, q11, q12"
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asm_text: "vmin.u16 q13, q14, q15"
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asm_text: "vmin.u32 q6, q7, q8"
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asm_text: "vmin.f32 q9, q5, q1"
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asm_text: "vmin.s8 q2, q2, q3"
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asm_text: "vmin.s16 q5, q5, q6"
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asm_text: "vmin.s32 q8, q8, q9"
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asm_text: "vmin.u8 q11, q11, q2"
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asm_text: "vmin.u16 q4, q4, q5"
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asm_text: "vmin.u32 q7, q7, q8"
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asm_text: "vmin.f32 q2, q2, q1"
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