mirror of
https://github.com/hedge-dev/XenonRecomp.git
synced 2025-06-06 01:02:08 +00:00
181 lines
4.2 KiB
YAML
181 lines
4.2 KiB
YAML
test_cases:
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-
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input:
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bytes: [ 0x20, 0x98, 0xc2, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "ummla z0.s, z1.b, z2.b"
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input:
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bytes: [ 0x20, 0x98, 0x02, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "smmla z0.s, z1.b, z2.b"
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-
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input:
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bytes: [ 0x20, 0x98, 0x82, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "usmmla z0.s, z1.b, z2.b"
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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input:
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bytes: [ 0x20, 0x98, 0xc2, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "ummla z0.s, z1.b, z2.b"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x98, 0x02, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "smmla z0.s, z1.b, z2.b"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x98, 0x82, 0x45 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "usmmla z0.s, z1.b, z2.b"
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-
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input:
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bytes: [ 0x20, 0x78, 0x82, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "usdot z0.s, z1.b, z2.b"
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x78, 0x82, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "usdot z0.s, z1.b, z2.b"
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input:
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bytes: [ 0x20, 0x18, 0xa2, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "usdot z0.s, z1.b, z2.b[0]"
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input:
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bytes: [ 0x20, 0x1c, 0xba, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "sudot z0.s, z1.b, z2.b[3]"
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x18, 0xa2, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "usdot z0.s, z1.b, z2.b[0]"
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-
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input:
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bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "movprfx z0, z7"
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-
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input:
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bytes: [ 0x20, 0x1c, 0xa2, 0x44 ]
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arch: "CS_ARCH_AARCH64"
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options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve", "+i8mm" ]
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expected:
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insns:
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-
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asm_text: "sudot z0.s, z1.b, z2.b[0]"
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