saulteafarmer/XenonRecomp
1
0
Fork 0
mirror of https://github.com/hedge-dev/XenonRecomp.git synced 2025-06-06 01:02:08 +00:00
Code Issues Packages Projects Releases Wiki Activity
XenonRecomp/thirdparty/capstone/tests/MC/AArch64/SVE/uqdecw.s.yaml
Sajid 0f9a53f75a Initial Commit
2024-09-07 18:15:29 +06:00

1021 lines
22 KiB
YAML
Raw Blame History

test_cases:
-
input:
bytes: [ 0xe0, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0"
-
input:
bytes: [ 0xe0, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0"
-
input:
bytes: [ 0xe0, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0"
-
input:
bytes: [ 0xe0, 0xff, 0xbf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, all, mul #16"
-
input:
bytes: [ 0xe0, 0xff, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw w0"
-
input:
bytes: [ 0xe0, 0xff, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw w0"
-
input:
bytes: [ 0xe0, 0xff, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw w0"
-
input:
bytes: [ 0xe0, 0xff, 0xaf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw w0, all, mul #16"
-
input:
bytes: [ 0x00, 0xfc, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw w0, pow2"
-
input:
bytes: [ 0x00, 0xfc, 0xaf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw w0, pow2, mul #16"
-
input:
bytes: [ 0xe0, 0xcf, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw z0.s"
-
input:
bytes: [ 0xe0, 0xcf, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw z0.s"
-
input:
bytes: [ 0xe0, 0xcf, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw z0.s"
-
input:
bytes: [ 0xe0, 0xcf, 0xaf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw z0.s, all, mul #16"
-
input:
bytes: [ 0x00, 0xcc, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw z0.s, pow2"
-
input:
bytes: [ 0x00, 0xcc, 0xaf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw z0.s, pow2, mul #16"
-
input:
bytes: [ 0x00, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, pow2"
-
input:
bytes: [ 0x20, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl1"
-
input:
bytes: [ 0x40, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl2"
-
input:
bytes: [ 0x60, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl3"
-
input:
bytes: [ 0x80, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl4"
-
input:
bytes: [ 0xa0, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl5"
-
input:
bytes: [ 0xc0, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl6"
-
input:
bytes: [ 0xe0, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl7"
-
input:
bytes: [ 0x00, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl8"
-
input:
bytes: [ 0x20, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl16"
-
input:
bytes: [ 0x40, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl32"
-
input:
bytes: [ 0x60, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl64"
-
input:
bytes: [ 0x80, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl128"
-
input:
bytes: [ 0xa0, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl256"
-
input:
bytes: [ 0xc0, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #14"
-
input:
bytes: [ 0xe0, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #15"
-
input:
bytes: [ 0x00, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #16"
-
input:
bytes: [ 0x20, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #17"
-
input:
bytes: [ 0x40, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #18"
-
input:
bytes: [ 0x60, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #19"
-
input:
bytes: [ 0x80, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #20"
-
input:
bytes: [ 0xa0, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #21"
-
input:
bytes: [ 0xc0, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #22"
-
input:
bytes: [ 0xe0, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #23"
-
input:
bytes: [ 0x00, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #24"
-
input:
bytes: [ 0x20, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #25"
-
input:
bytes: [ 0x40, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #26"
-
input:
bytes: [ 0x60, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #27"
-
input:
bytes: [ 0x80, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw x0, #28"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0xe0, 0xcf, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw z0.s"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0x00, 0xcc, 0xaf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw z0.s, pow2, mul #16"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0x00, 0xcc, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sve" ]
expected:
insns:
-
asm_text: "uqdecw z0.s, pow2"
-
input:
bytes: [ 0xe0, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0"
-
input:
bytes: [ 0xe0, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0"
-
input:
bytes: [ 0xe0, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0"
-
input:
bytes: [ 0xe0, 0xff, 0xbf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, all, mul #16"
-
input:
bytes: [ 0xe0, 0xff, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw w0"
-
input:
bytes: [ 0xe0, 0xff, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw w0"
-
input:
bytes: [ 0xe0, 0xff, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw w0"
-
input:
bytes: [ 0xe0, 0xff, 0xaf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw w0, all, mul #16"
-
input:
bytes: [ 0x00, 0xfc, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw w0, pow2"
-
input:
bytes: [ 0x00, 0xfc, 0xaf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw w0, pow2, mul #16"
-
input:
bytes: [ 0xe0, 0xcf, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw z0.s"
-
input:
bytes: [ 0xe0, 0xcf, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw z0.s"
-
input:
bytes: [ 0xe0, 0xcf, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw z0.s"
-
input:
bytes: [ 0xe0, 0xcf, 0xaf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw z0.s, all, mul #16"
-
input:
bytes: [ 0x00, 0xcc, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw z0.s, pow2"
-
input:
bytes: [ 0x00, 0xcc, 0xaf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw z0.s, pow2, mul #16"
-
input:
bytes: [ 0x00, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, pow2"
-
input:
bytes: [ 0x20, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl1"
-
input:
bytes: [ 0x40, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl2"
-
input:
bytes: [ 0x60, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl3"
-
input:
bytes: [ 0x80, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl4"
-
input:
bytes: [ 0xa0, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl5"
-
input:
bytes: [ 0xc0, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl6"
-
input:
bytes: [ 0xe0, 0xfc, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl7"
-
input:
bytes: [ 0x00, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl8"
-
input:
bytes: [ 0x20, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl16"
-
input:
bytes: [ 0x40, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl32"
-
input:
bytes: [ 0x60, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl64"
-
input:
bytes: [ 0x80, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl128"
-
input:
bytes: [ 0xa0, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, vl256"
-
input:
bytes: [ 0xc0, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #14"
-
input:
bytes: [ 0xe0, 0xfd, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #15"
-
input:
bytes: [ 0x00, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #16"
-
input:
bytes: [ 0x20, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #17"
-
input:
bytes: [ 0x40, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #18"
-
input:
bytes: [ 0x60, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #19"
-
input:
bytes: [ 0x80, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #20"
-
input:
bytes: [ 0xa0, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #21"
-
input:
bytes: [ 0xc0, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #22"
-
input:
bytes: [ 0xe0, 0xfe, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #23"
-
input:
bytes: [ 0x00, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #24"
-
input:
bytes: [ 0x20, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #25"
-
input:
bytes: [ 0x40, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #26"
-
input:
bytes: [ 0x60, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #27"
-
input:
bytes: [ 0x80, 0xff, 0xb0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw x0, #28"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0xe0, 0xcf, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw z0.s"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0x00, 0xcc, 0xaf, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw z0.s, pow2, mul #16"
-
input:
bytes: [ 0xe0, 0xbc, 0x20, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "movprfx z0, z7"
-
input:
bytes: [ 0x00, 0xcc, 0xa0, 0x04 ]
arch: "CS_ARCH_AARCH64"
options: [ "CS_OPT_NO_BRANCH_OFFSET", "aarch64", "sme" ]
expected:
insns:
-
asm_text: "uqdecw z0.s, pow2"
Reference in New Issue View Git Blame Copy Permalink